Sistema para emulación, adquisición y procesamiento de datos para matrices de sensores / System for emulation, acquisition and data processing for sensor matrices

Quinteros del Castillo, José I. (2020) Sistema para emulación, adquisición y procesamiento de datos para matrices de sensores / System for emulation, acquisition and data processing for sensor matrices. Proyecto Integrador Ingeniería en Telecomunicaciones, Universidad Nacional de Cuyo, Instituto Balseiro.

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Resumen en español

En el presente trabajo se desarrolló un sistema de adquisición de datos para matrices de 16 sensores, utilizando una placa CIAA-ACC y una placa AD9249-65EBZ con un conversor analógico digital de 16 canales simultáneos. El sistema se implementó sobre el SoC Xilinx Zynq-7030 de la placa CIAA-ACC, combinando lógica programable (FPGA) con software de control y transporte hacia un servidor externo. Se logró adquirir datos de los 16 canales desde la lógica programable a una tasa de 65 MSamples/s con una resolución de 14 bits, y una tasa de datos hacia un servidor externo de 92 Mbps. Para la evaluación del desempeño del sistema, se diseño y construyó un emulador de arreglo, con el objetivo de recrear las señales que se obtendrán con un arreglo de antenas cuadrado de 16 elementos, recibiendo una señal de 146 MHz, que llega al arreglo con 30° de azimut y 75° de elevación. La motivación del desarrollo de este proyecto es analizar la posibilidad de su integración en la recepción de datos en una estación terrena basada en conformación digital de haz, para prestar servicios a constelaciones de satélites de órbita baja.

Resumen en inglés

In this work, a data acquisition system for 16-sensor matrices was developed, using a CIAA-ACC board and an AD9249-65EBZ board with a simultaneous, 16-channel analog-digital converter. The system was implemented on the SoC Xilinx Zynq-7030 in the CIAA-ACC board, combining programmable logic (FPGA) with software for control and data transport to an external server. Data acquisition from all the 16 channels of the ADC was acheived, at its maximum rate of 65 MSamples/s, with a resolution of 14 bits per sample, as well as a data rate to an external server of 92 Mbps. For system performance evaluation purposes, an array emulator was designed and built, used to recreate the signals that would be obtained using a square, 16-element antenna array, receiving a 146 MHz signal arriving to the array with 30° azimut and 75° elevation. The motivation for this project is the analysis of its integration in a digital-beamforming-based ground station, to provide services to Low Earth Orbit satellite constellations.

Tipo de objeto:Tesis (Proyecto Integrador Ingeniería en Telecomunicaciones)
Palabras Clave:Data acquisition; Toma de datos; Sensors; Sensores; Matrices; [Emulation; Emulación; Sensor array; Arreglo de sensores; Digital beamforming]
Referencias:[1] Haynes, T. A primer on digital beamforming, 1998. xi, 2 [2] Analog Devices, Inc. AD9249 Datasheet and Product Info. URL https://www.analog.com/en/ products/ad9249.html. xi, xi, xii, 5, 7, 8, 39, 40, 41, 98 [3] Proyecto CIAA. Esquemático de la CIAA-ACC. URL https://github.com/ciaa/CIAA_ACC/ raw/master/hw/ciaa_acc_schematic.pdf. xi, xi, xiv, 10, 11, 68, 107 [4] Xilinx, Inc. UG471 - 7 Series FPGAs SelectIO Resources. URL https://www.xilinx.com/ support/documentation/user_guides/ug471_7Series_SelectIO.pdf. xi, xii, 11, 39, 44, 50, 51, 52 [5] Xilinx, Inc. DS190 - Zynq-7000 SoC Data Sheet: Overview. URL https://www.xilinx.com/ support/documentation/data_sheets/ds190-Zynq-7000-Overview.pdf. xi, 10, 13, 104 [6] Pozar, D. M. Microwave engineering. John Wiley & Sons, Inc., 2011. xi, xi, 18, 19, 26 [7] Analog Devices, Inc. AN-877: Interfacing to High Speed ADCs via SPI. URL https://www.analog.com/media/en/technical-documentation/application-notes/ AN-877.pdf?doc=AD9609.pdf. xii, 40, 41 [8] SpaceX, Inc. Starlink. URL https://www.starlink.com/. 1 [9] Telesat Canada. LEO Satellites. URL https://www.telesat.com/leo-satellites/. 1 [10] International Telecommunications Union. Radio Regulations. Chapter II, Article 5: Frequency Allocations. p. 78. RR2016Vol-I EA5.pdf. URL https://www.itu.int/dms_pub/itu-r/opb/ reg/R-REG-RR-2016-ZPF-E.zip. 2 [11] Quinteros del Castillo, J. I. Repositorio del Proyecto Integrador: Sistema para emulación, adquisición y procesamiento de datos de matrices de sensores. URL https://github.com/JIQdC/ PIQuinteros. 3 [12] Proyecto CIAA. >Que es Proyecto CIAA? URL http://www.proyecto-ciaa.com.ar/index_ quees.html. 9 [13] Proyecto CIAA. CIAA-ACC: computadora industrial abierta para aplicaciones de Alto Costo Computacional. URL http://www.proyecto-ciaa.com.ar/devwiki/doku.php?id= desarrollo:ciaa_acc:ciaa_acc_inicio. 9 [14] Xilinx, Inc. Zynq-7000 SoC. URL https://www.xilinx.com/products/silicon-devices/soc/ zynq-7000.html. 10 [15] Microchip Technologies, Inc. 7-Bit Single I2C Digital POT with Volatile Memory in SC70. URL https://ww1.microchip.com/downloads/en/DeviceDoc/22147a.pdf. 12 [16] Xilinx, Inc. UG472 - 7 Series FPGAs Clocking Resources. URL https://www.xilinx.com/ support/documentation/user_guides/ug472_7Series_Clocking.pdf. 12 [17] Xilinx, Inc. PetaLinux Tools. URL https://www.xilinx.com/products/design-tools/ embedded-software/petalinux-sdk.html. 14 [18] Xilinx, Inc. UG761 - AXI Reference Guide. URL https://www.xilinx.com/support/ documentation/ip_documentation/ug761_axi_reference_guide.pdf. 14 [19] LPKF. LPKF ProtoMat S103. URL https://www.lpkfusa.com/datasheets/prototyping/ s103.pdf. 14 [20] LPKF. LPKF ProtoFlow S. URL https://www.lpkf.com/fileadmin/mediafiles/user_ upload/products/pdf/DQ/flyer_lpkf_protoflow_s_en.pdf. 14 [21] Keysight Technologies, Inc. N9310A RF Signal Generator, 9 kHz to 3 GHz. URL https://www. keysight.com/en/pdx-x202262-pn-N9310A/rf-signal-generator-9-khz-to-3-ghz. 14 [22] Keysight Technologies. FieldFox Handheld Analyzers. URL https://www.keysight.com/us/ en/assets/7018-03314/data-sheets/5990-9783.pdf. 14 [23] Rohde & Schwarz. R&S ZNC Vector Network Analyzer - Specications. URL https://scdn.rohde-schwarz.com/ur/pws/dl_downloads/dl_common_library/dl_ brochures_and_datasheets/pdf_1/ZNC_dat-sw_en_5214-5610-22_v0302.pdf. 14 [24] Van Trees, H. L. Optimum Array Processing: Part IV of Detection, Estimation and Modulation Theory. Wiley-Interscience, 2002. 16 [25] KiCAD Developers Team. About KiCAD. URL https://kicad.org/about/kicad/. 20 [26] Dassault Systemes. CST Studio Suite. URL https://www.3ds.com/es/ productos-y-servicios/simulia/productos/cst-studio-suite/. 20 [27] Farnell website. Generic FR4 datasheet. URL https://www.farnell.com/datasheets/ 1644697.pdf. 20 [28] Farnell website. Generic RG58 datasheet. URL http://www.farnell.com/datasheets/ 2095749.pdf. 26 [29] Rohde & Schwarz. Most accurate way to measure the length of a cable with a VNA. URL https://www.rohde-schwarz.com/fi/faq/ most-accurate-way-to-measure-the-length-of-a-cable-with-a-vna-faq_78704-30360. html. 28 [30] Xilinx, Inc. Vivado Design Tools. URL https://www.xilinx.com/products/design-tools/ vivado.html. 35 [31] Xilinx, Inc. Xilinx Software Development Kit (XSDK). URL https://www.xilinx.com/ products/design-tools/embedded-software/sdk.html. 35 [32] Xilinx, Inc. PG082 - Processing System 7 v5.5. URL https://www.xilinx. com/support/documentation/ip_documentation/processing_system7/v5_5/ pg082-processing-system7.pdf. 36 [33] Xilinx, Inc. PG164 - Processor System Reset Module v5.0. URL https: //www.xilinx.com/support/documentation/ip_documentation/proc_sys_reset/v5_0/ pg164-proc-sys-reset.pdf. 37 [34] Xilinx, Inc. PG059 - AXI Interconnect v2.1. URL https://www.xilinx.com/support/ documentation/ip_documentation/axi_interconnect/v2_1/pg059-axi-interconnect.pdf. 37 [35] Xilinx, Inc. DS191 - Zynq-7000 SoC (Z-7030, Z-7035, Z-7045, and Z-7100): DC and AC Switching Characteristics. URL https://www.xilinx.com/support/documentation/data_sheets/ ds191-XC7Z030-XC7Z045-data-sheet.pdf. 39 [36] Xilinx, Inc. PG153 - AXI Quad SPI v3.2. URL https://www.xilinx.com/support/ documentation/ip_documentation/axi_quad_spi/v3_2/pg153-axi-quad-spi.pdf. 41 [37] Xilinx, Inc. PG070 - SelectIO Interface Wizard v5.1. URL https://www.xilinx.com/support/ documentation/ip_documentation/selectio_wiz/v5_1/pg070-selectio-wiz.pdf. 50 [38] Xilinx, Inc. PG121 - Binary Counter v12.0. URL https://www.xilinx.com/support/ documentation/ip_documentation/counter_binary/v12_0/pg121-c-counter-binary.pdf. 54 [39] Xilinx, Inc. PG057 - FIFO Generator v13.1. URL https://www.xilinx.com/support/ documentation/ip_documentation/fifo_generator/v13_1/pg057-fifo-generator.pdf. 58 [40] Xilinx, Inc. PG065 - Clocking Wizard v6.0. URL https://www.xilinx.com/support/ documentation/ip_documentation/clk_wiz/v6_0/pg065-clk-wiz.pdf. 62 [41] Internet Engineering Task Force (IETF). RFC 768 - User Datagram Protocol. URL https: //tools.ietf.org/html/rfc768. 71 [42] IEEE. IEEE 1588-2019 - IEEE Standard for a Precision Clock Synchronization Protocol for Networked Measurement and Control Systems. URL https://standards.ieee.org/standard/ 1588-2019.html. 76 [43] Wireshark Foundation. Wireshark - About. URL https://www.wireshark.org/index.html. 81 [44] Phase Difference Measurement with Matlab. URL https://www.mathworks.com/ matlabcentral/fileexchange/48025-phase-difference-measurement-with-matlab. 101 [45] Xilinx, Inc. PG141 - DDS Compiler v6.0. URL https://www.xilinx.com/support/ documentation/ip_documentation/dds_compiler/v6_0/pg141-dds-compiler.pdf. 104 [46] Xilinx, Inc. PG149 - FIR Compiler v7.2. URL https://www.xilinx.com/support/ documentation/ip_documentation/fir_compiler/v7_2/pg149-fir-compiler.pdf. 104 [47] Xilinx, Inc. PG104 - Complex Multiplier v6.0. URL https://www.xilinx.com/support/ documentation/ip_documentation/cmpy/v6_0/pg104-cmpy.pdf. 104 [48] Grigolato, L. M. Informe de PI: Conformación digital de haz para recepción de señales satelitales. Instituto Balseiro, 2020. 104 [49] Texas Instruments, Inc. TCAN33x 3.3-V CAN Transceivers with CAN FD (Flexible Data Rate). URL https://www.ti.com/lit/ds/symlink/tcan332.pdf?HQS= TI-null-null-digikeymode-df-pf-null-wwe&ts=1604680908806. 107
Materias:Ingeniería en telecomunicaciones
Divisiones:Gcia. de área de Investigación y aplicaciones no nucleares > Laboratorio de investigación aplicada en Telecomunicaciones
Código ID:912
Depositado Por:Marisa G. Velazco Aldao
Depositado En:30 Abr 2021 08:24
Última Modificación:30 Abr 2021 08:24

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