Quinteros del Castillo, José I. (2020) Sistema para emulación, adquisición y procesamiento de datos para matrices de sensores / System for emulation, acquisition and data processing for sensor matrices. Proyecto Integrador Ingeniería en Telecomunicaciones, Universidad Nacional de Cuyo, Instituto Balseiro.
| PDF (Tesis) Español 31Mb |
Resumen en español
En el presente trabajo se desarrolló un sistema de adquisición de datos para matrices de 16 sensores, utilizando una placa CIAA-ACC y una placa AD9249-65EBZ con un conversor analógico digital de 16 canales simultáneos. El sistema se implementó sobre el SoC Xilinx Zynq-7030 de la placa CIAA-ACC, combinando lógica programable (FPGA) con software de control y transporte hacia un servidor externo. Se logró adquirir datos de los 16 canales desde la lógica programable a una tasa de 65 MSamples/s con una resolución de 14 bits, y una tasa de datos hacia un servidor externo de 92 Mbps. Para la evaluación del desempeño del sistema, se diseño y construyó un emulador de arreglo, con el objetivo de recrear las señales que se obtendrán con un arreglo de antenas cuadrado de 16 elementos, recibiendo una señal de 146 MHz, que llega al arreglo con 30° de azimut y 75° de elevación. La motivación del desarrollo de este proyecto es analizar la posibilidad de su integración en la recepción de datos en una estación terrena basada en conformación digital de haz, para prestar servicios a constelaciones de satélites de órbita baja.
Resumen en inglés
In this work, a data acquisition system for 16-sensor matrices was developed, using a CIAA-ACC board and an AD9249-65EBZ board with a simultaneous, 16-channel analog-digital converter. The system was implemented on the SoC Xilinx Zynq-7030 in the CIAA-ACC board, combining programmable logic (FPGA) with software for control and data transport to an external server. Data acquisition from all the 16 channels of the ADC was acheived, at its maximum rate of 65 MSamples/s, with a resolution of 14 bits per sample, as well as a data rate to an external server of 92 Mbps. For system performance evaluation purposes, an array emulator was designed and built, used to recreate the signals that would be obtained using a square, 16-element antenna array, receiving a 146 MHz signal arriving to the array with 30° azimut and 75° elevation. The motivation for this project is the analysis of its integration in a digital-beamforming-based ground station, to provide services to Low Earth Orbit satellite constellations.
Tipo de objeto: | Tesis (Proyecto Integrador Ingeniería en Telecomunicaciones) |
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Palabras Clave: | Data acquisition; Toma de datos; Sensors; Sensores; Matrices; [Emulation; Emulación; Sensor array; Arreglo de sensores; Digital beamforming] |
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Materias: | Ingeniería en telecomunicaciones |
Divisiones: | Gcia. de área de Investigación y aplicaciones no nucleares > Laboratorio de investigación aplicada en Telecomunicaciones |
Código ID: | 912 |
Depositado Por: | Marisa G. Velazco Aldao |
Depositado En: | 30 Abr 2021 08:24 |
Última Modificación: | 30 Abr 2021 08:24 |
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